1. Technology Field
The invention generally relates to a data reading method for a rewritable non-volatile memory, and more particularly, to a method for correctly reading data from a rewritable non-volatile memory by adjusting the read voltage when the data cannot be corrected, and a memory controller and a memory storage apparatus using the same.
2. Description of Related Art
In recently years, the consumers' demand to storage media for storing digital contents has increased drastically along with the widespread of digital cameras, cell phones, and MP3. Flash memory is one of the most adaptable storage media to be carried around and used for storing digital files due to its characteristics such as data non-volatility, low power consumption, small volume, and non-mechanical structure. A solid state drive (SSD) is a storage device which uses a flash memory as its storage medium, and SSD has been broadly applied into computer host systems as the primary hard disk.
Existing flash memories can be categorized into NOR flash memories and NAND flash memories. Flash memories may also be categorized into multi-level cell (MLC) flash memories and single-level cell (SLC) flash memories based on the number of data bits stored in each memory cell. Each memory cell of a SLC flash memory can store only one bit of data, while each memory cell of a MLC flash memory can store at least two bits of data. Taking a 4-level cell flash memory as an example, each memory cell thereof can store two bits of data (i.e., “11”, “10”, “00”, and “01”).
The memory cells of a flash memory are connected by bit lines and word lines to form a memory cell array. When a control circuit for controlling the bit lines and the word lines reads data from or writes data into specific memory cells of the memory cell array, the floating voltages on other memory cells may be disturbed so that error bits may be produced (i.e., data read by the control circuit from a memory cell (also referred to as a read data) is different from the previously written data (also referred to as a write data). Or, when a flash memory is worn out due to long-term idle, electric leakage, or repeated erasing or writing operations, floating voltages on the memory cells may also be changed and accordingly error bits may occur.
A memory storage apparatus is usually disposed with an error checking and correcting (ECC) circuit. When data is written, the ECC circuit generates an ECC code for the data. When subsequently the data is read, the ECC circuit performs error correcting and decoding (also referred to as an error correcting procedure) on the data according to the corresponding ECC code, so as to correct any error bit. However, the ECC circuit can only correct a limited number of error bits, and data cannot be corrected if the number of error bits in the data exceeds the number of error bits that can be corrected by the ECC circuit. In this case, the host system cannot correctly data read from the memory storage apparatus. The number of error bits will be increased due to the advancement in fabrication process and the characteristics of memory hardware structures (for example, the more data bits are stored in each memory cell of a MLC flash memory, the more error bits may occur). Thereby, how to ensure the accuracy of read data has become one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.